In the prior art, as a multilayer wiring of LSI, aluminum (Al) or aluminum alloy is employed. As one of the forming methods, such a method is known that a wiring is formed by the dry etching method using a mask and then an insulating film is stacked on the wiring.
In recent years, with the progress of finer patterning of the multilayer wiring, a delay in operation caused by resistance of the wiring material becomes a problem. As the measure to the delay in operation, copper or copper alloy a resistance value of which is lower than aluminum is employed as the wiring material. Meanwhile, in the manufacturing method employing the dry etching method using a mask, it is difficult to pattern the wiring more finely. Thus, the fine pattern of the wiring is formed by employing the damascene method employing the chemical mechanical polishing (CMP) method.
In the common wiring formation by the damascene method, at first a first insulating film acting as a stopper for the dry etching is stacked on a semiconductor substrate, and then a second insulating film is stacked on the first insulating film. Then, a resist pattern is formed on the second insulating film, and then the etching is applied by using the dry etching method while using the resist pattern as a mask. Accordingly, the second insulating film is etched, and wiring recesses are formed. A barrier metal film and a Cu seed film are stacked sequentially in the wiring recesses by the physical vapor deposition (PVD) method. Then, a Cu film is deposited in the wiring recesses by the plating method. Finally, the extra Cu film and the extra barrier metal film in areas other than the wiring recesses are removed by the CMP method.
When the barrier metal film on the surface of the second insulating film is removed by the CMP method, in some cases a polishing time is set longer than a required time. Such polishing may be called the “over polishing”. At this time, when slurry for the barrier metal polishing has a high polishing rate of the insulating film and a low polishing rate of the Cu film, the polishing of the Cu film is accelerated relatively with respect to the insulating film. Thus, the Cu film in the wiring recesses is depressed from a surface height of the second insulating film. Such phenomenon may be called the “dishing”. For this reason, recently the slurry for the barrier metal polishing, which may be used in polishing the insulating film simultaneously and may suppress a sinking of the Cu wiring, has been developed.
As the second insulating film, a silicon oxide (SiO2) film whose dielectric constant is 4.2 is used. However, when the insulating film whose dielectric constant is high is used, an electric leakage path is readily caused due to a parasitic capacitance of the insulating film in a situation that the wirings are formed as the fine patterns and a distance between the wirings becomes short. Thus, it is discussed nowadays that a low dielectric constant film whose dielectric constant is 3.0 or less should be used as the insulating film.
However, normally a surface of the low dielectric constant film whose dielectric constant is 3.0 or less is covered with a methyl group (CHx), and this low dielectric constant film has hydrophobicity. Thus, the polishing slurry is hardly fitted to the surface of the low dielectric constant film, and thus the polishing is hard to proceed. Also, film strength of the low dielectric constant film is weak, and also adhesion to the underlying insulating film is small. Thus, film peeling is easily caused when this film is polished by the CMP method.
Thus, in the prior art, an oxide film (SiO2) whose dielectric constant is 4.2, for example, is formed as a cap film on the low dielectric constant film, and then the wiring formation and the polishing are applied. Such cap film has a good wettability to the polishing slurry rather than the low dielectric constant film. As a result, the polishing of the insulating film may be proceeded and the dishing may be suppressed. Also, the cap film has a strong film strength and high adhesion, and thus film peeling may be prevented during the polishing. In this case, from a viewpoint of preventing the film peeling, the cap film of predetermined film thickness is left after the polishing is completed.